I/O pins of a microcomputer system once configured and designated for interfacing with an external I/O device or bus usually cannot be reconfigured for interfacing with another external I/O device or bus. For example, if some I/O pins of a chip or board are configured and designated for interfacing with a PCI bus, these I/O pins cannot be reconfigured for interfacing with an ISA bus.
For instance, the UPI-452 CHMOS programmable I/O processor by Intel is a general-purpose slave I/O processor that allows the designer to grow a customized interface solution. However, the level of programming flexibility is low. For example, Port 1 (A0-A7) of the UPI-452 processor is an 8-bit quasi-bi-directional I/O port. Port 1's alternate functions can be activated only if the corresponding bit latch in another port SFR contains a one. Although the pins of port 1 can be programmed to have alternate functions, these functions are limited. In other words, the eight pins of port 1 cannot be reprogrammed to have other functions other than the listed functions they have been designed to handle.
Therefore, it is an object of this present invention to provide a chip/board with I/O pins that can be reprogrammed to perform varied functions.